Computer Memory With Short Access Time

Computer Memory With Short Access Time – In this lecture we return to the memory system that we last discussed in The Hierarchy of Memory. There we got to know the basic trade-off in current storage technologies: As the storage capacity increases, so does the access time. It requires some architectural intelligence to build a storage system that has large capacity and small average access time. Intelligence is built into the cache, a hardware subsystem that sits between the CPU and main memory. Modern CPUs have multiple levels of cache, with the first level of modest capacity having an access time close to that of the CPU, and the higher levels of cache having slower access times but larger capacities.

Caches provide fast access to a small number of memory locations using associative addressing, so the cache is able to hold the contents of memory locations that the CPU accesses most frequently. The current content of the cache is automatically managed by the hardware. Caches work well because of the locality principle: if the CPU accesses location X at time T, it will likely access nearby locations in the not too distant future. The cache is arranged so that all nearby locations can be cached at the same time, using a simple indexing scheme to select which cache location to check for a matching address. When the address requested by the CPU is in the cache, the access time is pretty fast.

Computer Memory With Short Access Time

To increase the likelihood that requested addresses are in the cache, we introduced the notion of “associability”, which increased the number of cache locations checked on each access and solved the problem that, for example, instructions and data reside around the same cache -Locations compete.

Types Of Storage Devices

We also discuss appropriate choices for block size (the number of words in a cache line), overwrite policy (how to choose which cache line to reuse on a cache miss), and write policy (deciding when to write changed data to the main memory are to be written back). ). We’ll revisit the same options in this class as we work to extend the memory hierarchy beyond main memory.

We never discuss where data in main memory comes from and how the process of filling main memory is managed. This is the topic of today’s lecture.

Pen drives and hard drives offer storage options with more capacity than main memory, with the added benefit of being non-volatile, i.e. non-volatile. H. they store data even when switched off. The common name for these new devices is “secondary storage” where the data resides until it is transferred to “primary storage” i.e. for use. H. the main memory. So when we first turn on a computer system, all of its data resides in secondary storage, which we consider to be the last level in our storage hierarchy.

As we think about the right memory architecture, we build on the ideas from our earlier discussion of caches and actually think of main memory as just another cache layer for persistent, high-capacity secondary storage. We will build a so-called virtual memory system that, like caches, automatically moves data from secondary memory to main memory when needed. The virtual memory system also allows us to control what data the program can access and serves as a stepping stone to building a system that can safely run many programs on a single CPU.

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The bad news: Hard drive access times are 100,000 times faster than DRAM. So the change in access time from DRAM to disk is much, much larger than the change from caches to DRAM.

Looking at the DRAM time, we found that the additional access time to fetch a contiguous block of word was small compared to the access time for the first word. So fetching a block was the right plan, assuming we were going to access the words in addition eventually. With disk, the difference in access time between the first word and subsequent words is even more dramatic. Therefore, it is not surprising that we read quite large amounts of data from the hard drive.

The consequence of the much, much longer access time to secondary storage is that accessing the hard drive takes a very long time if the required data is not in main storage. Therefore, we need to design our virtual memory system to minimize errors when accessing main memory. A failure and a subsequent disk access have a large impact on the average storage access time; Therefore, the error rate must be very, very small compared to, for example, the instruction execution rate.

Given secondary storage’s huge failure penalties, what does this tell us about how it should be used as part of our storage hierarchy?

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We need high associativity, i. H. we need a lot of flexibility in how data can be stored from the hard disk in the main memory. In other words, if our working set of memory accesses fits into main memory, our virtual memory system must allow this and avoid unnecessary collisions between accesses to one data block and another.

We want to use a large block size to take advantage of the small incremental cost of reading consecutive words from disk. And given the locality principle, we expect to be able to access other words in the block, amortizing the cost of failure over many future hits.

Finally, we want to use a writeback strategy where we update the disk contents only when the changed data in main storage needs to be replaced with data from other blocks of secondary storage.

There are advantages to losing with such long latencies. We can manage the organization of the main storage and the accesses to the secondary storage in software. Although thousands of instructions are required to deal with the aftermath of a failure, the execution of these instructions is fast compared to a hard disk’s access time. Therefore, our strategy will be to deal with hardware hits and software failures. This will lead to simple memory management hardware and the ability to use very clever strategies implemented in software to figure out what to do in case of failure.

Difference Between L1, L2, And L3 Cache: How Does Cpu Cache Work?Computer Memory With Short Access Time

See how our virtual storage system will work. The memory addresses generated by the CPU are called virtual addresses to distinguish them from the physical addresses used by main memory. Between the CPU and the main memory is a new piece of hardware called the Memory Management Unit (MMU). The task of the MMU is to convert virtual addresses into physical addresses.

“But wait!” you say. “Isn’t the cache between the CPU and main memory?” You are right and at the end of this talk we will talk about how to use an MMU and a cache. But let’s assume for now that there is only one MMU and no cache.

The MMU hardware converts virtual addresses to physical addresses using a simple table lookup. Such a table is called a page map or page table. Conceptually, the MMU uses the virtual address as an index to select an entry in the table, which tells us the corresponding physical address. The table allows a given virtual address to be found anywhere in main memory. In normal operation we want to ensure that two virtual addresses are not mapped to the same physical address. But it’s okay if some of the virtual addresses don’t have a translation to a physical address. This would indicate that the contents of the requested virtual address have not yet been loaded into main memory, so the MMU would signal a memory management exception to the CPU, which could allocate a location in physical memory and perform the necessary I/O operation to initialize that secondary location.

The MMU table gives the system a lot of control over how physical memory is accessed by the program running on the CPU. For example, we can run multiple programs in quick succession (a technique called time-sharing) by changing the page structure when we switch programs. Main memory locations accessible to one program can be made inaccessible to another program by properly managing their respective page images. And we could use memory management exceptions to load the program’s contents into main memory when needed, instead of loading the entire program before execution begins. In fact, we just need to make sure that a program’s current working set is actually in main memory. Locations that are not currently in use can remain on secondary storage until needed. In this talk and the next, we will see how the MMU plays a central role in the design of a modern timesharing computer system.

Pdf) Fast Creation Of Short Living Virtual Machines Using Copy On Write Ram Disks

A typical page size is 4 KB to 16 KB, which corresponds to p=12 and p=14, respectively. Suppose p = 12. So if the CPU issues a 32-bit virtual address, the low-order 12 bits of the virtual address are the page offset and the high-order 20 bits are the virtual page number. Likewise, the low order p bits of the physical address are the page offset and the remaining bits of the physical address are the physical page number.

The key idea is that the MMU manages sites, not individual sites. We will move entire pages from secondary storage to main storage. by the mayor,

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